威尼斯游乐城app

ADESTO TECHNOLOGIES

Adesto Technologies Fusion Enhanced Serial Flash

Adesto Technologies Fusion Enhanced Serial Flash

Adesto Technologies Serial Flash devices incorporate some of the industry's most advanced and flexible features, many of which are unparalleled by other solutions on the market. The Adesto Serial Flash family of products is based on proven and robust NOR Flash technology. 

Adesto Technologies AT25D series Serial Flash incorporates a uniform block-erase (4-KBytes, 32-KBytes, and 64-KBytes) architecture to provide a high level of flexibility for a wide variety of code storage applications. AT25D series devices feature advanced security and protection functions to prevent critical code blocks from being erroneously or maliciously altered. AT25D series devices are pin-compatible with Atmel's Serial EEPROMs, giving developers the flexibility to increase memory size without changing the board layout.

Adesto's AT25SF family includes 4, 8, 16 and 32‐Mbit density multi‐I/O products designed for higher density devices. The AT25SF series incorporates a uniform, block-erase architecture to provide a high level of flexibility for a wide variety of code storage applications. These SPI‐compatible 2.5V to 3.6V products feature up to 104MHz operating speed and fast program and erase times. The devices also include security features such as a programmable security register and hardware controlled locking of protected blocks. The AT25SF family is ideal for high‐volume, consumer‐based applications in which program code is shadowed from flash into embedded or external RAM for execution.


AT25DN512C Features

  • 威尼斯游乐城appSingle 2.3V - 3.6V Supply

  • Serial Peripheral Interface (SPI) Compatible

    • 威尼斯游乐城app-Supports SPI Modes 0 and 3

    • 威尼斯游乐城app-Supports Dual Output Read

  • 85MHz Maximum Operating Frequency

    • Clock-to-Output (tV) of 7 ns

  • 威尼斯游乐城appFlexible, Optimized Erase Architecture for Code + Data Storage Applications

    • Uniform 256-Byte Page erase

    • Uniform 4-Kbyte Block Erase

    • Uniform 32-Kbyte Block Erase

    • Full Chip Erase

  • 威尼斯游乐城appHardware Controlled Locking of Protected Sectors via WP Pin

  • 128-Byte Programmable OTP Security Register

  • 威尼斯游乐城appFlexible Programming

    • Byte/Page Program (1 to 256 Bytes)

  • 威尼斯游乐城appFast Program and Erase Times

    • 威尼斯游乐城app1.5ms Typical Page Program (256 Bytes) Time

    • 50ms Typical 4-Kbyte Block Erase Time

    • 400ms Typical 32-Kbyte Block Erase Time

  • Automatic Checking and Reporting of Erase/Program Failures

  • 威尼斯游乐城appSoftware Controlled Reset

  • JEDEC Standard Manufacturer and Device ID Read Methodology

  • Low Power Dissipation

    • 威尼斯游乐城app200nA Ultra Deep Power Down current (Typical)

    • 5μA Deep Power-Down Current (Typical)

    • 25uA Standby current (Typical)

    • 威尼斯游乐城app5mA Active Read Current (Typical)

  • Endurance: 100,000 Program/Erase Cycles

  • Data Retention: 20 Years

  • Complies with Full Industrial Temperature Range

  • Industry Standard Green (Pb/Halide-free/RoHS Compliant) Package Options

    • 8-lead SOIC (150-mil)

    • 8-pad Ultra Thin DFN (2 x 3 x 0.6 mm)

    • 8-lead TSSOP Package

AT25DFxxx Features


  • 威尼斯游乐城appBlock erase sizes of 4KB, 32KB and 64KB, as well as full chip erase

  • 512-Kbit to 64-Mbit densities in production

  • 威尼斯游乐城appVariable-sized page program allows programming 1 to 256 bytes at a time

  • 1.65V, 2.3V and 2.7V minimum Vcc voltage range options

  • 100 MHz+ SPI, Dual-I/O, and Quad-I/O support

  • Individual sector protection and lockdown

  • 威尼斯游乐城app128-byte OTP security register

  • 100,000 program/erase cycles per block

  • 威尼斯游乐城appJEDEC manufacturer and device ID as standard


AT25DFxxx Benefits

  • Low-voltage operation optimizes battery life and eliminates extra regulators and supply rails

  • 威尼斯游乐城appEnhanced nonvolatile sector protection options simplify system protection schemes

  • Quad I/O and Dual I/O capability improves data transfer rates and execute-in-place (XIP) operation

AT25F512B Features

  • Single 2.7V - 3.6V Supply

  • 威尼斯游乐城appSerial Peripheral Interface (SPI) Compatible

  • 70 MHz Maximum Operating Frequency

    • Clock-to-Output (tV威尼斯游乐城app) of 6 ns Maximum

  • Flexible, Optimized Erase Architecture for Code + Data Storage Applications

AT25SF Features

  • 威尼斯游乐城appSingle 2.5V - 3.6V Supply

  • Serial Peripheral Interface (SPI) Compatible

  • 威尼斯游乐城app104MHz Maximum Operating Frequency

    • Clock-to-Output (tV) of 6 ns 

  • Flexible, Optimized Erase Architecture for Code + Data Storage Applications

    • Uniform 4-Kbyte Block Erase

    • Uniform 32-Kbyte Block Erase

    • Uniform 64-Kbyte Block Erase

  • Full Chip Erase

  • Hardware Controlled Locking of Protected Blocks via WP Pin

  • 威尼斯游乐城app3 Protected Programmable Security Register Pages

  • 威尼斯游乐城appFlexible Programming

    • Byte/Page Program (1 to 256 Bytes)

  • Fast Program and Erase Times

    • 威尼斯游乐城app0.7ms Typical Page Program (256 Bytes) Time

    • 70ms Typical 4-Kbyte Block Erase Time

    • 300ms Typical 32-Kbyte Block Erase Time

    • 600ms Typical 64-Kbyte Block Erase Time

  • JEDEC Standard Manufacturer and Device ID Read Methodology

  • Low Power Dissipation

    • 威尼斯游乐城app2μA Deep Power-Down Current (Typical)

    • 10μA Standby current (Typical)

    • 4mA Active Read Current (Typical)

  • Endurance: 100,000 Program/Erase Cycles

  • Data Retention: 20 Years

  • 威尼斯游乐城appComplies with Full Industrial Temperature Range



AT25DFxxx Block Diagram

AT25DFxxx Block Diagram

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